6–10 Jul 2026
University of the Western Cape
Africa/Johannesburg timezone
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Development and Validation of Tile Pre-Processor Sub-Modules for the ATLAS Tile Calorimeter Phase-II Upgrade at the HL-LHC

7 Jul 2026, 17:20
1h 20m
Great Hall (University of the Western Cape)

Great Hall

University of the Western Cape

Poster Presentation Track F - Applied Physics Poster Session 1

Speaker

Mpho Gololo (University of Johannesburg)

Description

The High-Luminosity Large Hadron Collider (HL-LHC) upgrade places stringent performance and reliability requirements on the ATLAS Tile Calorimeter (TileCal) readout circuits. A crucial component of this upgrade is the Tile Pre-Processor (TilePPr), a part of the off-detector electronics in charge of data processing, control, and communication. As part of the Phase-II upgrade, crucial TilePPr sub-modules are being created and manufactured at the University of Johannesburg (UJ). The production of Tile Gigabit Ethernet (GbE) Switch Printed Circuit Boards (PCBs) and Tile Computer-on-Module (TileCoM) PCBs by South African industrial partners is the main emphasis of this study. Five TileCoM PCBs and ten Tile GbE Switch PCBs have been manufactured. At UJ, a specialized test station has been created to conduct communication interface testing and electrical validation, guaranteeing adherence to system specifications. These tests confirm the TilePPr architecture's functionality, dependability, and integration readiness. The modules are ready to be shipped to CERN for inclusion into the TileCal off-detector electronics chain after successful validation. This effort demonstrates expertise in sophisticated high-energy physics instrumentation within a worldwide collaborative framework, highlighting the contribution of UJ and South African industry to the ATLAS Phase-II upgrade.

Author

Mpho Gololo (University of Johannesburg)

Presentation materials