Speaker
Description
The High Granularity Timing Detector (HGTD) demonstrator was developed to validate the design and performance of its components. The setup included a printed circuit board (PEB), 54 modules, flex tails, a cooling system, and a data acquisition (DAQ) server. Tasks performed involved connecting flex tails, conducting alignment and I2C tests, and performing scanning tests to check bump connections. Threshold voltage (Vth) scans were conducted with high voltage (HV) off at different injected charge values to verify electrical contact between readout electronics and the sensor. Module tuning and charge scans were performed by analysing the time-over-threshold (TOT). A comparison of Vth scans with HV both off and on was done to validate module performance. I2C test failures and high voltage issues, such as large leakage current causing modules to turn off, were identified. Furthermore, clock jitter measurements and calibration methods, mitigating pile-up effects in the forward region, were intended to ensure that the detector’s timing capabilities meet specifications and to identify potential issues with clock distribution or signal integrity. In parallel, work progressed on the second-generation demonstrator, incorporating a slice of the prototype vessel with final design features and an increased number of active components to further refine and validate the HGTD design and its integration aspects, such as the Faraday cage.
Apply for student award at which level: | PhD |
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Consent on use of personal information: Abstract Submission | Yes, I ACCEPT |